clk: samsung: Add support for EPLL on exynos5410
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Fri, 9 Sep 2016 08:09:05 +0000 (10:09 +0200)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Fri, 9 Sep 2016 15:35:13 +0000 (17:35 +0200)
commitbe95d2c7d918b2b7b973378a1e92bdc6559c21f9
tree9888fb20a27881c24d85743b18b5787ddd2b763e
parentc17a6163647a20d22fa03c00ba8714492b0311c6
clk: samsung: Add support for EPLL on exynos5410

This patch adds code instantiating the EPLL, which is used as the
audio subsystem's root clock.
The requirement to specify the external root clock in clocks property
is documented.  Having the consumer 'clocks' property ensures proper
initialization order by explicitly specifying dependencies in DT.
It prevents situations when the SoC's clock controller driver has
initialized, the external oscillator clock is not yet registered
and setting clock frequencies through assigned-clock-rates property
doesn't work properly due to unknown external oscillator frequency.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Documentation/devicetree/bindings/clock/exynos5410-clock.txt
drivers/clk/samsung/clk-exynos5410.c
drivers/clk/samsung/clk-pll.c
drivers/clk/samsung/clk-pll.h