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Tegra: memctrl_v2: implement MC txn override WAR
authorVarun Wadekar <vwadekar@nvidia.com>
Wed, 17 Feb 2016 23:07:49 +0000 (15:07 -0800)
committerVarun Wadekar <vwadekar@nvidia.com>
Mon, 20 Mar 2017 16:14:51 +0000 (09:14 -0700)
commitbe87d920bfd8c70dc3c96dc726f1686bd3430cc0
tree32013e3827a7b15c48b91c2c40089676f58dd2b5tree | snapshot
parent67bc721b2bc321e07b1ea50c53dd35915dc2a949commit | diff
Tegra: memctrl_v2: implement MC txn override WAR

This patch sets the Memory Controller's TXN_OVERRIDE registers
for most write clients to CGID_ADR. This ensures ordering is maintained.
In some cases WAW ordering problems could occur. There are different
settings for Tegra version A01 v A02.

Original changes by Alex Waterman <alexw@nvidia.com>

Change-Id: I82ea02afa43a24250ed56985757b83e78e71178c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c diff | blob | history
plat/nvidia/tegra/include/drivers/memctrl_v2.h diff | blob | history
plat/nvidia/tegra/include/t186/tegra_def.h diff | blob | history
Broadcom-s Trusted Firmware A