net: hisilicon: Offset buf address to adapt HI13X1_GMAC
authorJiangfeng Xiao <xiaojiangfeng@huawei.com>
Tue, 9 Jul 2019 03:31:09 +0000 (11:31 +0800)
committerDavid S. Miller <davem@davemloft.net>
Tue, 9 Jul 2019 21:29:26 +0000 (14:29 -0700)
commitb9162d20ed493bc0d5ea3016647d636628e1f9d5
tree58833787af6f890a82143c2e6d42b3895caa1220
parent06ddc0d8d7fc43d872c3d1c9399050e40ddbec4d
net: hisilicon: Offset buf address to adapt HI13X1_GMAC

The buf unit size of HI13X1_GMAC is cache_line_size,
which is 64, so the address we write to the buf register
needs to be shifted right by 6 bits.

The 31st bit of the PPE_CFG_CPU_ADD_ADDR register
of HI13X1_GMAC indicates whether to release the buffer
of the message, and the low indicates that it is valid.

Signed-off-by: Jiangfeng Xiao <xiaojiangfeng@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hip04_eth.c