mpc8569mds: fix some ddr settings
authorHaiying Wang <Haiying.Wang@freescale.com>
Wed, 29 Sep 2010 17:31:36 +0000 (13:31 -0400)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 7 Oct 2010 14:49:47 +0000 (09:49 -0500)
commitb6bde930901b1375264865b979507eb25806cb77
tree036cd7c39a9d11753fb1cdc27b54672ec239c5c5
parent3aed55074211b4e886d97f16773f186a019d508d
mpc8569mds: fix some ddr settings

Enable half drive strength, set RTT to 60Ohm and set write leveling override.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/freescale/mpc8569mds/ddr.c