Tegra: support to set the L2 ECC and Parity enable bit
authorHarvey Hsieh <hhsieh@nvidia.com>
Wed, 23 Nov 2016 11:13:08 +0000 (19:13 +0800)
committerVarun Wadekar <vwadekar@nvidia.com>
Wed, 16 Jan 2019 18:10:52 +0000 (10:10 -0800)
commitb495791ba28ae36078e09d32877fca8e97088410
tree7c8d1f779947b6b7dc33dcd6220ed43f4f30e11a
parent322e7c3e003cdcf954fb1e82cb9184405e053d03
Tegra: support to set the L2 ECC and Parity enable bit

This patch adds capability to read the boot flag to enable L2 ECC
and Parity Protection bit for the Cortex-A57 CPUs. The previous
bootloader sets this flag value for the platform.

* with some coverity fix:
MISRA C-2012 Directive 4.6
MISRA C-2012 Rule 2.5
MISRA C-2012 Rule 10.3
MISRA C-2012 Rule 10.4

Change-Id: Id7303bbbdc290b52919356c31625847b8904b073
Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
docs/plat/nvidia-tegra.rst
plat/nvidia/tegra/common/aarch64/tegra_helpers.S
plat/nvidia/tegra/common/tegra_bl31_setup.c
plat/nvidia/tegra/include/tegra_private.h
plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
plat/nvidia/tegra/soc/t186/plat_setup.c