drm/amdgpu: Use dynamic IP offset for register access on SOC15
authorShaoyun Liu <Shaoyun.Liu@amd.com>
Mon, 27 Nov 2017 18:20:38 +0000 (13:20 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 8 Dec 2017 16:17:56 +0000 (11:17 -0500)
commitb466107e8be15e1727e288639098ef6bfec1a982
treef83a075eda4d1c7085e9b929d2dd69ac2756329b
parent4522824c488e93755b10349cf6af0e967fb73186
drm/amdgpu: Use dynamic IP offset for register access on SOC15

Update the register access macros and functions to take into
account the new dynamic IP base offsets.

Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/soc15_common.h