drm/i915/icl: Fix the macros for DFLEXDPMLE register bits
authorManasi Navare <manasi.d.navare@intel.com>
Tue, 23 Oct 2018 19:12:47 +0000 (12:12 -0700)
committerManasi Navare <manasi.d.navare@intel.com>
Wed, 31 Oct 2018 23:21:13 +0000 (16:21 -0700)
commitb4335ec0a3ee6229a570755f8fb95dc8a7c694f2
tree83c447d7ec65de1e14c91eabd47ddfe40c1ab548
parent17a3b15ac6afc7ef968e1e5a2ff26736abd01bb0
drm/i915/icl: Fix the macros for DFLEXDPMLE register bits

This patch fixes the macros used for defining the DFLEXDPMLE
register bit fields. This accounts for changes in the spec.

Fixes: a2bc69a1a9d6 ("drm/i915/icl: Add register definition for DFLEXDPMLE")
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: <stable@vger.kernel.org> # v4.19+
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181023191248.26418-1-manasi.d.navare@intel.com
drivers/gpu/drm/i915/i915_reg.h