projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 83b84c4) | patch
[ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value.
authorPavel Pisa <ppisa@pikron.com>
Wed, 7 Mar 2007 22:56:16 +0000 (23:56 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 12 Mar 2007 16:49:35 +0000 (16:49 +0000)
commitb3c6b76ffb1a8c8d1f12e838a25c1a86f5316e2c
tree7e68897d90f93ea62b890128408cfbf2d0b57c86tree | snapshot
parent83b84c4e8c7cf00e26610f03ee59e9be010f527ccommit | diff
[ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value.

Only System PLL clock source is selectable by CSCR_SYSTEM_SEL
bit. MPU PLL is driven by 512*CLK32 for each case.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-imx/cpufreq.c diff | blob | history
arch/arm/mach-imx/generic.c diff | blob | history
John Crispins staging tree