net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
authorOleksij Rempel <o.rempel@pengutronix.de>
Wed, 1 Apr 2020 09:57:32 +0000 (11:57 +0200)
committerDavid S. Miller <davem@davemloft.net>
Wed, 1 Apr 2020 18:20:47 +0000 (11:20 -0700)
commitb1f4c209d84057b6d40b939b6e4404854271d797
treefe026f04d39222a1fd46da2185b952e8340523b2
parentcef8dac96bc108633f5090bb3a9988d734dc1ee0
net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035

The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
for the values that comprise the fields, not zero-bits-set.

This patch fixes the clock frequency configuration for ATH8030 and
ATH8035 Atheros PHYs by removing the erroneous "~".

To reproduce this bug, configure the PHY  with the device tree binding
"qca,clk-out-frequency" and remove the machine specific PHY fixups.

Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/at803x.c