projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 09f380e) | patch
drm/sun4i: DW HDMI PHY: Add support for second PLL
authorJernej Skrabec <jernej.skrabec@siol.net>
Mon, 25 Jun 2018 12:02:58 +0000 (14:02 +0200)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Wed, 27 Jun 2018 19:44:01 +0000 (21:44 +0200)
commitaef13fd8426279fcd9e0b2b5b446d35c0d49ec5d
tree9f719209bebfdfdb0f07edd48cb4cef12272af1ftree | snapshot
parent09f380e3ba4103a32faf4fad35d90dc144578214commit | diff
drm/sun4i: DW HDMI PHY: Add support for second PLL

Some DW HDMI PHYs, like those found in A64 and R40 SoCs, can select
between two clock parents.

Add code which reads second PLL from DT.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180625120304.7543-19-jernej.skrabec@siol.net
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h diff | blob | history
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c diff | blob | history
John Crispins staging tree