ASoC: Intel: bytcr_rt5651: Configure PLL1 before using it
authorHans de Goede <hdegoede@redhat.com>
Sun, 4 Mar 2018 14:36:03 +0000 (15:36 +0100)
committerMark Brown <broonie@kernel.org>
Wed, 7 Mar 2018 14:18:18 +0000 (14:18 +0000)
commitaeec6cc0821573920d559f7d6297ea5dd3fbbd17
tree78a575a275a3583e838184f8e575581099e26998
parent8ffaa6a136e6f30e053e78fb9742c7748bef8576
ASoC: Intel: bytcr_rt5651: Configure PLL1 before using it

When platform_clock_control() first selects PLL1 as sysclk the PLL_CTRL
registers have not been setup yet and we effectively have an invalid clock
configuration until byt_rt5651_aif1_hw_params() gets called.

Add a new byt_rt5651_prepare_and_enable_pll1() helper and use that from
both platform_clock_control() and byt_rt5651_aif1_hw_params() to fix this.

Tested-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/boards/bytcr_rt5651.c