drm/i915: Fix PM refcounting w/o DMC firmware
authorImre Deak <imre.deak@intel.com>
Wed, 15 Aug 2018 13:10:38 +0000 (16:10 +0300)
committerImre Deak <imre.deak@intel.com>
Wed, 15 Aug 2018 14:22:32 +0000 (17:22 +0300)
commitad3c776b171078a10ace07616a34ed6266beb0e7
tree4d5c4cc69c7b0a191784817316f950e801a6ee30
parenta99b32a6fff7e482a267c72e565c8c410ce793d7
drm/i915: Fix PM refcounting w/o DMC firmware

The case where the firmware isn't specified for a platform (although
runtime PM works only with DMC on this platform) is the same case where
the firmware is specified but can't be loaded for some reason. Hence we
need to get a display init power domain ref in the first case too to
keep the refcount bookkeeping in balance.

Also convert the related log message to be a debug one, since it's a
valid scenario for a new platform, where we need to have
dev_info->has_csr=1 set, but add support for actually loading the
firmware only later.

v2:
- In addition to the debug log, WARN on non-alpha support platforms,
  since then the first case isn't valid scenario. (Chris)

References: https://bugs.freedesktop.org/show_bug.cgi?id=107382
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180815131038.24446-1-imre.deak@intel.com
drivers/gpu/drm/i915/intel_csr.c