Tegra: fix defects flagged by MISRA Rule 10.3
authorAnthony Zhou <anzhou@nvidia.com>
Wed, 26 Jul 2017 09:16:54 +0000 (17:16 +0800)
committerVarun Wadekar <vwadekar@nvidia.com>
Fri, 18 Jan 2019 17:21:50 +0000 (09:21 -0800)
commitaa64c5fb676853961ff4f4133d8917c1805bd7fd
treef45452212ac7f0795cde0c6c263d9e996af4b3a8
parente680a3971473d09e395c412a19186b1448496e7b
Tegra: fix defects flagged by MISRA Rule 10.3

MISRA Rule 10.3, the value of an expression shall not be assigned to
an object with a narrower essential type or of a different essential
type category.

The essential type of a enum member is anonymous enum, the enum member
should be casted to the right type when using it.

Both UL and ULL suffix equal to uint64_t constant in compiler
aarch64-linux-gnu-gcc, to avoid confusing, only keep U and ULL suffix
in platform code. So in some case, cast a constant to uint32_t is
necessary.

Change-Id: I1aae8cba81ef47481736e7f95f53570de7013187
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
16 files changed:
plat/nvidia/tegra/common/drivers/bpmp/bpmp.c
plat/nvidia/tegra/common/drivers/memctrl/memctrl_v2.c
plat/nvidia/tegra/common/drivers/smmu/smmu.c
plat/nvidia/tegra/common/tegra_sip_calls.c
plat/nvidia/tegra/include/drivers/bpmp.h
plat/nvidia/tegra/include/drivers/memctrl_v2.h
plat/nvidia/tegra/include/drivers/smmu.h
plat/nvidia/tegra/include/t186/tegra_def.h
plat/nvidia/tegra/include/t210/tegra_def.h
plat/nvidia/tegra/soc/t186/drivers/mce/ari.c
plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c
plat/nvidia/tegra/soc/t186/plat_memctrl.c
plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
plat/nvidia/tegra/soc/t210/drivers/se/se_private.h
plat/nvidia/tegra/soc/t210/drivers/se/security_engine.c