staging: rtl8723au: hal: rewrite the right hand side of an assignment
authorAya Mahfouz <mahfouz.saif.elyazal@gmail.com>
Thu, 26 Feb 2015 09:30:01 +0000 (11:30 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 26 Feb 2015 23:23:46 +0000 (15:23 -0800)
commita9dbc808e97b34684d570e4654b03f48b0eba3a8
tree8b2daaed0ecd014727f719f85de9199f321da8a1
parent26aab2b14cfef377e8a339348d8c5057bcba30e8
staging: rtl8723au: hal: rewrite the right hand side of an assignment

This patch rewrites the right hand side of an assignment for
expressions of the form:
a = (a <op> b);
to be:
a <op>= b;
where <op> = << | >>.

This issue was detected and resolved using the following
coccinelle script:

@@
identifier i;
expression e;
@@

-i = (i >> e);
+i >>= e;

@@
identifier i;
expression e;
@@

-i = (i << e);
+i <<= e;

Signed-off-by: Aya Mahfouz <mahfouz.saif.elyazal@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8723au/hal/HalHWImg8723A_RF.c