ARM: OMAP5 / DRA7: PM: Update CPU context register offset
authorSantosh Shilimkar <santosh.shilimkar@ti.com>
Wed, 6 Feb 2013 14:09:07 +0000 (19:39 +0530)
committerNishanth Menon <nm@ti.com>
Mon, 8 Sep 2014 16:38:40 +0000 (11:38 -0500)
commita89726d3b4cb81b033e34cc55974a33dab3279da
treee54382822612a6f35f8f324bd01543bbc56d3f46
parentdbbe9770d11284322db289c6ec83e8911e7a8f89
ARM: OMAP5 / DRA7: PM: Update CPU context register offset

On OMAP5, RM_CPUi_CPUi_CONTEXT offset has changed. Update the code
so that same code works for OMAP4+ devices. DRA7 and OMAP5 have the same
context offset as well.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[rnayak@ti.com: for DRA7]
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[nm@ti.com: rebase, split/merge etc..]
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
arch/arm/mach-omap2/omap-mpuss-lowpower.c