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(parent: 418ec85) | patch
ppc/p4080: CoreNet platfrom style CCSRBAR setting
authorKumar Gala <galak@kernel.crashing.org>
Thu, 17 Sep 2009 06:44:00 +0000 (01:44 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 24 Sep 2009 17:05:28 +0000 (12:05 -0500)
commita880cf3e0e1c220d780eccd0b101170c4499485d
tree5a1d6288e8127ce2de572afff2e8a42e0a4d06a3tree | snapshot
parent418ec8584343f04048e2cc7ee96b6b29be54ad97commit | diff
ppc/p4080: CoreNet platfrom style CCSRBAR setting

On CoreNet based platforms the CCSRBAR address is split between an high &
low register and we no longer shift the address.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
cpu/mpc85xx/cpu_init_early.c diff | blob | history
Broadcom-s U-Boot