mpc512x: Adjust the DRAM init sequence to the datasheet spec
authorAnatolij Gustschin <agust@denx.de>
Fri, 8 Feb 2013 00:03:49 +0000 (00:03 +0000)
committerWolfgang Denk <wd@denx.de>
Sat, 9 Mar 2013 07:23:02 +0000 (08:23 +0100)
commita615dfda8c2041dd98ecd238d45f3bc35e495b44
treeb177e8e05649ba7da7f8f7dcfe309fb29b7aef68
parentfcc7fe425183f9ec95fba33d041eb359d0a3a598
mpc512x: Adjust the DRAM init sequence to the datasheet spec

Do maintain a 200 usecs period of stable power and clock before
asserting the CKE signal and sending commands, have at least 200
DRAM clock cycles pass after initialization before data access.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
arch/powerpc/cpu/mpc512x/fixed_sdram.c
arch/powerpc/include/asm/immap_512x.h