drm/i915/chv: Initial clock gating support for Cherryview
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 9 Apr 2014 10:28:10 +0000 (13:28 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 12 May 2014 17:50:00 +0000 (19:50 +0200)
commita4565da8ae5fc9fe4186538870b4d12f461f008e
tree5167c0791cd26ba21f49e7690094659a958a5f7d
parent74e1ca8cf086bb3611dd430d920dc477370fe5c8
drm/i915/chv: Initial clock gating support for Cherryview

CHV clock gating isn't identical to VLV, so add a new function
for it. This is only a start, and further changes are needed as
the details become available.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c