disable dsp freq use for vlynq bus clock init, disable external clocking (it locks...
authorNicolas Thill <nico@openwrt.org>
Tue, 11 Sep 2007 14:50:43 +0000 (14:50 +0000)
committerNicolas Thill <nico@openwrt.org>
Tue, 11 Sep 2007 14:50:43 +0000 (14:50 +0000)
commita34609b4f866786be9678579b474cb830e9f7968
treeb011cf8ccdc29a54a26b8e0a45660118a6b41975
parenteead2e03109fcef4dddb49283dd9156a27526b18
disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors.
cleanup:
 * remove volative and use readl & writel accessors instead
 * use set_irq_chip & friends for irq setup
 * use kzalloc instead of kmalloc
 * secure VINT_VECTOR macro argument
 * remove unused vlynq_local_id function

SVN-Revision: 8750
target/linux/ar7/files/arch/mips/ar7/vlynq.c
target/linux/ar7/files/include/asm-mips/ar7/vlynq.h