projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 6a13044) | patch
spi: lpspi: Fix CLK pin becomes low before one transfer
authorClark Wang <xiaoning.wang@nxp.com>
Mon, 7 Jan 2019 07:47:43 +0000 (07:47 +0000)
committerMark Brown <broonie@kernel.org>
Mon, 7 Jan 2019 15:18:13 +0000 (15:18 +0000)
commita15dc3d657fa2df08d1adbed926050314b5f4ba7
tree1e9f4dc40afbfc1c8de635d1b80137c70b60dc6ftree | snapshot
parent6a130448498c151d31f1fb6f3003f5cf37b829e0commit | diff
spi: lpspi: Fix CLK pin becomes low before one transfer

Remove Reset operation in fsl_lpspi_config(). This RST may cause both CLK
and CS pins go from high to low level under cs-gpio mode.
Add fsl_lpspi_reset() function after one message transfer to clear all
flags in use.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-fsl-lpspi.c diff | blob | history
John Crispins staging tree