KVM: x86: reserve bit 8 of non-leaf PDPEs and PML4Es in 64-bit mode on AMD
authorPaolo Bonzini <pbonzini@redhat.com>
Tue, 2 Sep 2014 11:24:12 +0000 (13:24 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Wed, 3 Sep 2014 08:04:11 +0000 (10:04 +0200)
commita0c0feb57992c5caed170feab8a68c51306eb7c3
tree03865eccb27cbc1a2604d6e83ae3f8ecff9b355c
parentd143148383d0395539073dd6c2f25ddf6656bdcc
KVM: x86: reserve bit 8 of non-leaf PDPEs and PML4Es in 64-bit mode on AMD

Bit 8 would be the "global" bit, which does not quite make sense for non-leaf
page table entries.  Intel ignores it; AMD ignores it in PDEs, but reserves it
in PDPEs and PML4Es.  The SVM test is relying on this behavior, so enforce it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/cpuid.h
arch/x86/kvm/mmu.c