drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are enabled
authorImre Deak <imre.deak@intel.com>
Thu, 28 Sep 2017 10:06:24 +0000 (13:06 +0300)
committerImre Deak <imre.deak@intel.com>
Mon, 2 Oct 2017 09:09:11 +0000 (12:09 +0300)
commit9dfe2e3ad375a9ba32a13888873ec4586be01ff7
tree02e65e5010f99234570b61f07e3ad2a3092f5e5a
parentdd9f31c7a3887950cbd0d49eb9d43f7a1518a356
drm/i915/gen8+: Init/reset display interrupts only if i915 IRQs are enabled

Only init / reset the display interrupts during power well enabling /
disabling if the i915 interrupts are enabled. So far we did the
init / reset during driver loading / resuming too, where
initialization / enabling of the i915 interrupts happens only at a later
point. This didn't cause a problem due to GEN8_MASTER_IRQ_CONTROL being
cleared, but triggered gen3_assert_iir_is_zero() in GEN8_IRQ_INIT_NDX().

References: https://bugs.freedesktop.org/show_bug.cgi?id=102988
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20170928100624.15533-1-imre.deak@intel.com
drivers/gpu/drm/i915/i915_irq.c