clk: uniphier: add more USB3 PHY clocks
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 20 Jul 2018 08:37:36 +0000 (17:37 +0900)
committerStephen Boyd <sboyd@kernel.org>
Wed, 25 Jul 2018 22:45:32 +0000 (15:45 -0700)
commit9d222574ef72216bd8332708750bbe743db9bea3
treefddcde9d1763da1c3e27934ef1fa8d28454f5637
parent0316c018c5a84d4e0b43123057adada3cddb3e00
clk: uniphier: add more USB3 PHY clocks

Add USB3 PHY clocks where missing.  Use fixed-factor clocks for those
without gating.

For clarification, prefix clock names with 'ss' or 'hs'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/uniphier/clk-uniphier-sys.c