powerpc/44x/fsp2: Interrupt handling setup
authorIvan Mikhaylov <ivan@de.ibm.com>
Fri, 1 Dec 2017 15:58:25 +0000 (18:58 +0300)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 11 Dec 2017 02:03:32 +0000 (13:03 +1100)
commit9c4c374676a12db4a452534f3347323d35c32d1a
treeaf5d1a55c0fa4bd6a513bef219d24d229b6107d8
parent494d82ceae7f3b9fdb5154b4469e5bb22f56040b
powerpc/44x/fsp2: Interrupt handling setup

* clear out any possible plb6 errors
* board interrupt handling setup within l2 reg set
* fsp2 parity error setup

All those points are needed for correct interrupt
handling on board level including error handling report.

Reviewed-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Ivan Mikhaylov <ivan@de.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/platforms/44x/fsp2.c