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(parent: 570744b) | patch
drm/amd/display: dp interlace MSA timing programming for Interlace mode.
authorCharlene Liu <charlene.liu@amd.com>
Wed, 19 Dec 2018 18:47:19 +0000 (13:47 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 14 Jan 2019 20:41:39 +0000 (15:41 -0500)
commit9983b80053e4fd3d5dea7b936aa933edd49924ce
tree29aaae9327178f91ca3413ba1fa7dbb62944e2b1tree | snapshot
parent570744b98ca865d95bdf2da064a7a57f2655f889commit | diff
drm/amd/display: dp interlace MSA timing programming for Interlace mode.

[Why]
DP compliance box shows wrong MSA data.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c diff | blob | history
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c diff | blob | history
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