tegra: mmc: Support operation with dcache enabled
authorSimon Glass <sjg@chromium.org>
Mon, 9 Jan 2012 13:20:40 +0000 (13:20 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 12 Feb 2012 09:11:22 +0000 (10:11 +0100)
commit98450d0220eea0ab32385063e2e27fb1eb92a746
treeea2c58cf115b996a502d27fff9f5e03323778257
parentca28090d2114eba17fb30579a69691d2b3aadf74
tegra: mmc: Support operation with dcache enabled

When the data cache is enabled we must flush on write and invalidate
on read. We also check that buffers are aligned to data cache lines
boundaries. With recent work in U-Boot this should generally be the case
but the warnings will catch problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
drivers/mmc/tegra2_mmc.c