drm/amd/powerplay: Enable UVD powergating for SMU7
authorTom St Denis <tom.stdenis@amd.com>
Fri, 30 Sep 2016 14:58:44 +0000 (10:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Oct 2016 18:38:25 +0000 (14:38 -0400)
commit97f40ef049dded1962bc9e70ad4d197fa8a5cadb
treef6edd8d9535a625fdb159c300148106cbaf07520
parentf8991bab1aa2121e33b8569857dfb22e536bc396
drm/amd/powerplay: Enable UVD powergating for SMU7

This patch enables detecting VCE/UVD PG features and fixes the
UVD powergate function.

Tested on a Tonga (by reading UVD tile/clk bits during playback/idle).

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c