x86/CPU/AMD: Fix LLC ID bit-shift calculation
authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Wed, 13 Jun 2018 18:43:10 +0000 (13:43 -0500)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 22 Jun 2018 19:21:49 +0000 (21:21 +0200)
commit964d978433a4b9aa1368ff71227ca0027dd1e32f
tree4ec8e2677665c624544224831fe0aa9d50c49133
parent7731b8bc94e599c9a79e428f3359ff2c34b7576a
x86/CPU/AMD: Fix LLC ID bit-shift calculation

The current logic incorrectly calculates the LLC ID from the APIC ID.

Unless specified otherwise, the LLC ID should be calculated by removing
the Core and Thread ID bits from the least significant end of the APIC
ID. For more info, see "ApicId Enumeration Requirements" in any Fam17h
PPR document.

[ bp: Improve commit message. ]

Fixes: 68091ee7ac3c ("Calculate last level cache ID from number of sharing threads")
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1528915390-30533-1-git-send-email-suravee.suthikulpanit@amd.com
arch/x86/kernel/cpu/cacheinfo.c