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(parent: d1b6013) | patch
intel: agilex: Clear PLL lostlock bypass mode
authorHadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Fri, 16 Aug 2019 03:08:14 +0000 (11:08 +0800)
committerHadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Mon, 19 Aug 2019 02:56:31 +0000 (10:56 +0800)
commit960a12b3fb4699cad83973c853fb5064ed6a75d0
tree6a33c0a28c429705fcc976f2addae8c758dc8098tree | snapshot
parentd1b6013d8485094d948e6b6039b8d119a907ecf8commit | diff
intel: agilex: Clear PLL lostlock bypass mode

To provide glitchless clock to downstream logic even if clock toggles

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I728d64d0ba3b4492125bea5b0737fc83180356f1
plat/intel/soc/agilex/include/agilex_clock_manager.h diff | blob | history
plat/intel/soc/agilex/soc/agilex_clock_manager.c diff | blob | history
Broadcom-s Trusted Firmware A