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(parent: 1cc619b) | patch
ipu common: reset ipuv3 correctly
authorLiu Ying <Ying.Liu@freescale.com>
Sat, 6 Oct 2012 04:16:04 +0000 (04:16 +0000)
committerAnatolij Gustschin <agust@denx.de>
Tue, 6 Nov 2012 21:24:11 +0000 (22:24 +0100)
commit945d069fb5c8932e74aeba178c60a9dc6e9cba93
tree6f8361c6771812663f2654467219bd7acd9dd513tree | snapshot
parent1cc619be8b73abbee2fd6faf2cd4ade27b516531commit | diff
ipu common: reset ipuv3 correctly

This patch checks self-clear sw_ipu_rst bit in
SCR register of SRC controller to be cleared
after setting it to high to reset IPUv3. This
makes sure that IPUv3 finishes sofware reset.
A timeout mechanism is added to stop polling
on the bit status in case the bit could not be
cleared by the hardware automatically within
10 millisecond.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
drivers/video/ipu_common.c diff | blob | history
Broadcom-s U-Boot