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(parent: d3ec3a0) | patch
arm64: Enable workaround for Cavium TX2 erratum 219 when running SMT
authorMarc Zyngier <marc.zyngier@arm.com>
Tue, 9 Apr 2019 15:26:21 +0000 (16:26 +0100)
committerWill Deacon <will@kernel.org>
Tue, 8 Oct 2019 11:25:25 +0000 (12:25 +0100)
commit93916beb70143c46bf1d2bacf814be3a124b253b
treeb77b4aee5aedd2b7875ca36a1e35b374035fcedetree | snapshot
parentd3ec3a08fa700c8b46abb137dce4e2514a6f9668commit | diff
arm64: Enable workaround for Cavium TX2 erratum 219 when running SMT

It appears that the only case where we need to apply the TX2_219_TVM
mitigation is when the core is in SMT mode. So let's condition the
enabling on detecting a CPU whose MPIDR_EL1.Aff0 is non-zero.

Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/kernel/cpu_errata.c diff | blob | history
John Crispins staging tree