drm/i915: Use Engine1 instance for gen11 pm interrupts
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Wed, 10 Apr 2019 10:59:22 +0000 (13:59 +0300)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 11 Apr 2019 07:40:35 +0000 (08:40 +0100)
commit917dc6b53c273dd7e026f158ad4894ae366da326
treed5aa7804647d3920248af2a6a966703ba99fdd50
parent1071d0f6877e63d3354bac7fb4b1e6c740b388f0
drm/i915: Use Engine1 instance for gen11 pm interrupts

With gen11 the interrupt registers are shared between 2 engines,
with Engine1 instance being upper word and Engine0 instance being
lower. Annoyingly gen11 selected the pm interrupts to be in the
Engine1 instance.

Rectify the situation by shifting the access accordingly,
based on gen.

v2: comments, warn on overzealous rps_events

Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=108059
Testcase: igt/i915_pm_rps@min-max-config-loaded
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190410105923.18546-6-mika.kuoppala@linux.intel.com
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_reg.h