clk: zx: reform pll config info to ease code extension
authorJun Nie <jun.nie@linaro.org>
Tue, 6 Sep 2016 06:02:41 +0000 (14:02 +0800)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 14 Sep 2016 20:48:32 +0000 (13:48 -0700)
commit8d9a0860b75525e3cf240bc152bfdeaeb2e562a1
tree7e3ee13a267085c5ba5869e3ed5af020de2481aa
parent6e2e7c9fdae316bfb2724d2dbf230678d3f09092
clk: zx: reform pll config info to ease code extension

Add power down bit and pll lock bit in pll config structure
to ease new SoC support.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/zte/clk.c
drivers/clk/zte/clk.h