Correct usage of data and instruction barriers
authorAndrew Thoelke <andrew.thoelke@arm.com>
Mon, 28 Apr 2014 11:28:39 +0000 (12:28 +0100)
committerAndrew Thoelke <andrew.thoelke@arm.com>
Wed, 7 May 2014 10:19:47 +0000 (11:19 +0100)
commit8cec598ba3b689b86d9dfc58bca5610bdc48f55a
tree10a3622d6a57fe02b45112fd512297238ad93dc5
parente404d7f44a190b82332bb96daffa0c6239732218
Correct usage of data and instruction barriers

The current code does not always use data and instruction
barriers as required by the architecture and frequently uses
barriers excessively due to their inclusion in all of the
write_*() helper functions.

Barriers should be used explicitly in assembler or C code
when modifying processor state that requires the barriers in
order to enable review of correctness of the code.

This patch removes the barriers from the helper functions and
introduces them as necessary elsewhere in the code.

PORTING NOTE: check any port of Trusted Firmware for use of
system register helper functions for reliance on the previous
barrier behaviour and add explicit barriers as necessary.

Fixes ARM-software/tf-issues#92

Change-Id: Ie63e187404ff10e0bdcb39292dd9066cb84c53bf
18 files changed:
bl1/aarch64/bl1_arch_setup.c
bl1/aarch64/bl1_entrypoint.S
bl1/aarch64/bl1_exceptions.S
bl2/aarch64/bl2_entrypoint.S
bl31/aarch64/bl31_entrypoint.S
bl31/bl31_main.c
drivers/arm/gic/aarch64/gic_v3_sysregs.S
lib/aarch64/cache_helpers.S
lib/aarch64/cpu_helpers.S
lib/aarch64/misc_helpers.S
lib/aarch64/sysreg_helpers.S
lib/aarch64/tlb_helpers.S
plat/fvp/aarch64/plat_common.c
plat/fvp/plat_gic.c
plat/fvp/plat_pm.c
services/std_svc/psci/psci_afflvl_off.c
services/std_svc/psci/psci_afflvl_suspend.c
services/std_svc/psci/psci_entry.S