drm/amd/display: Program DSC during timing programming
authorNikola Cornij <nikola.cornij@amd.com>
Wed, 26 Feb 2020 19:53:54 +0000 (14:53 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 9 Mar 2020 17:49:34 +0000 (13:49 -0400)
commit8cc426d79be1c360f2cc53a469a9eb7c737ccad9
tree2869fb9da9364e385f49aff5664fbeb963fe5334
parent4c631826e0bcfaefe580faeb4ef6651e5ebe57c1
drm/amd/display: Program DSC during timing programming

[why]
Link or DIG BE can't be exposed to a higher stream bandwidth than they
can handle. When DSC is required to fit the stream into the link
bandwidth, DSC has to be programmed during timing programming to ensure
this. Without it, intermittent issues such as black screen after S3 or a
hot-plug can be seen.

[how]
Move DSC programming from enabling stream on link to timing setup.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link.c
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/inc/dc_link_dp.h