projects / openwrt / staging / blogic.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 2aae008) | patch
parisc: Fix detection of nonsynchronous cr16 cycle counters
authorHelge Deller <deller@gmx.de>
Wed, 18 Oct 2017 20:25:00 +0000 (22:25 +0200)
committerHelge Deller <deller@gmx.de>
Thu, 19 Oct 2017 07:21:24 +0000 (09:21 +0200)
commit8642b31ba9eef8a01845146a26682d4869e62513
treea846d9728f5e77b2c964ca1c24a7e3430f235e3atree | snapshot
parent2aae008ca6b3f5e978bea7aff265def4f2282f90commit | diff
parisc: Fix detection of nonsynchronous cr16 cycle counters

For CPUs which have an unknown or invalid CPU location (physical location)
assume that their cycle counters aren't syncronized across CPUs.

Signed-off-by: Helge Deller <deller@gmx.de>
Fixes: c8c3735997a3 ("parisc: Enhance detection of synchronous cr16 clocksources")
Cc: stable@vger.kernel.org # 4.13+
Signed-off-by: Helge Deller <deller@gmx.de>
arch/parisc/kernel/time.c diff | blob | history
John Crispins staging tree