drm/i915: Clear PPS port select when giving up the power sequencer
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 16 Oct 2014 18:29:51 +0000 (21:29 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 4 Nov 2014 22:22:03 +0000 (23:22 +0100)
commit83b8459756659ce55446e3eb97d64b966c60bfb9
treefbc8bedb4e000743f5835c55897fe4c697180664
parent9a42356b964dee6418d8b812109298658cc8dc38
drm/i915: Clear PPS port select when giving up the power sequencer

VLV gets confused if two power sequencers have the same port selected.
It would seem the port doesn't start up properly in the is case and
vlv_wait_port_ready() will fail as will the link training. Clearing the
port select in the PP_ON_DELAYS register fixes this problem.

CHV doesn't seem to need this, but it doesn't seem to hurt either so
let's just do it for both to keep the code between the platforms as
uniform as possible.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c