85xx: Add some L1/L2 SPR register definitions
authorKumar Gala <galak@kernel.crashing.org>
Mon, 14 Jul 2008 19:07:02 +0000 (14:07 -0500)
committerAndrew Fleming-AFLEMING <afleming@freescale.com>
Tue, 15 Jul 2008 01:19:59 +0000 (20:19 -0500)
commit7f9f4347cf325c63a39fe30910f3fb211ae2cc15
treefa1cf8a170572b65af737680b1000d0324099c60
parente5852787f0c3c442a276262f13d91ca450605ac0
85xx: Add some L1/L2 SPR register definitions

Add new L1/L2 SPRs related to e500mc cache config and control.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
include/asm-ppc/processor.h