ARM: 7062/1: cache: detect PIPT I-cache using CTR
authorWill Deacon <will.deacon@arm.com>
Tue, 23 Aug 2011 21:22:11 +0000 (22:22 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 17 Oct 2011 08:13:41 +0000 (09:13 +0100)
commit7f94e9cc5e965519d865bf20215036f359a1e299
tree0c3e4254e4d11255b15c64dcc613599f0a149f83
parent0744a3ee37784dfda0025963716a36c3f1e3adcc
ARM: 7062/1: cache: detect PIPT I-cache using CTR

The Cache Type Register L1Ip field identifies I-caches with a PIPT
policy using the encoding 11b.

This patch extends the cache policy parsing to identify PIPT I-caches
correctly and prevent them from being treated as VIPT aliasing in cases
where they are sufficiently large.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/include/asm/cachetype.h
arch/arm/kernel/setup.c