x86/microcode/intel: Extend BDW late-loading further with LLC size check
authorJia Zhang <zhang.jia@linux.alibaba.com>
Tue, 23 Jan 2018 10:41:32 +0000 (11:41 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Wed, 24 Jan 2018 12:00:35 +0000 (13:00 +0100)
commit7e702d17ed138cf4ae7c00e8c00681ed464587c7
treea61b7671b22c03f3ae35a4ef49a902fd911964c3
parent40d4071ce2d20840d224b4a77b5dc6f752c9ab15
x86/microcode/intel: Extend BDW late-loading further with LLC size check

Commit b94b73733171 ("x86/microcode/intel: Extend BDW late-loading with a
revision check") reduced the impact of erratum BDF90 for Broadwell model
79.

The impact can be reduced further by checking the size of the last level
cache portion per core.

Tony: "The erratum says the problem only occurs on the large-cache SKUs.
So we only need to avoid the update if we are on a big cache SKU that is
also running old microcode."

For more details, see erratum BDF90 in document #334165 (Intel Xeon
Processor E7-8800/4800 v4 Product Family Specification Update) from
September 2017.

Fixes: b94b73733171 ("x86/microcode/intel: Extend BDW late-loading with a revision check")
Signed-off-by: Jia Zhang <zhang.jia@linux.alibaba.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Tony Luck <tony.luck@intel.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/1516321542-31161-1-git-send-email-zhang.jia@linux.alibaba.com
arch/x86/kernel/cpu/microcode/intel.c