clk: lpc32xx: add HCLK PLL output configuration
authorSylvain Lemieux <slemieux@tycoint.com>
Wed, 10 Feb 2016 18:52:32 +0000 (13:52 -0500)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 10 Feb 2016 20:45:16 +0000 (12:45 -0800)
commit7e0810c9485ce696df3813574bca44139f6eb0c8
tree713ed9293393277038ffcb223b1d8fed65356e9f
parent58bb621536d1f64db619744c85dcbb94705eda85
clk: lpc32xx: add HCLK PLL output configuration

This patch add the support to setup the HCLK PLL output
using the "assigned-clock-rates" parameter in the device tree.

If the option is not use, the clock setup by the kickstart
and/or bootloader remain unchanged.

The previous kernel version did not change the clock frequency
output setup by the kickstart and/or bootloader;
this version always setup the clock frequency output to 208MHz.

Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/nxp/clk-lpc32xx.c
include/dt-bindings/clock/lpc32xx-clock.h