x86: BayTrail: southcluster.asl: Change PCI 64 bit address range / region
authorStefan Roese <sr@denx.de>
Mon, 22 Oct 2018 12:07:53 +0000 (14:07 +0200)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 28 Oct 2018 13:02:15 +0000 (21:02 +0800)
commit7d2a0534a6a4a4b92a58098f484f9e172149b784
tree78d59400d9d9efac4dc495f31ea4198c655bbdc6
parent24a72511e7eeec78c9cc3f72953ff8726849b0c1
x86: BayTrail: southcluster.asl: Change PCI 64 bit address range / region

To allow bigger 64 bit prefetchable PCI regions in Linux, this patch
changes the base address and range of the ACPI area passed to Linux.
BayTrail can only physically access 36 bit of PCI address space. So
just chaning the range without changing the base address won't work
here, as 0xf.ffff.ffff is already the maximum address.

With this patch, a maximum of 16 GiB of local DDR is supported. This
should be enough for all BayTrail boards though.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl