powerpc/8xxx: Enabled hwconfig for memory interleaving
authorKumar Gala <galak@kernel.crashing.org>
Wed, 14 Jul 2010 15:04:21 +0000 (10:04 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 26 Jul 2010 18:16:08 +0000 (13:16 -0500)
commit79e4e6480b359cb28129cecfa2cae0ef9cccf803
tree45345be233f602736fd7df42c579b1b3abab6768
parentfd3c9befa83eecf6e7c6ef03c501159fbf754143
powerpc/8xxx: Enabled hwconfig for memory interleaving

Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
hwconfig parameters. The syntax is

    setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"

The mode values for memory controller interleaving are
    cacheline
    page
    bank
    superbank

The mode values for bank interleaving are
    cs0_cs1
    cs2_cs3
    cs0_cs1_and_cs2_cs3
    cs0_cs1_cs2_cs3

Signed-off-by: York Sun <yorksun@freescale.com>
arch/powerpc/cpu/mpc8xxx/ddr/options.c
doc/README.fsl-ddr