Tegra186: mce: driver for the CPU complex power manager block
authorVarun Wadekar <vwadekar@nvidia.com>
Tue, 14 Mar 2017 21:24:35 +0000 (14:24 -0700)
committerVarun Wadekar <vwadekar@nvidia.com>
Mon, 20 Mar 2017 16:09:36 +0000 (09:09 -0700)
commit7808b06b991905e58228c8c4df7026be637b0c00
tree502bab92f137899bb830445817157984477828da
parent3cf3183fc2382e88f8f831921a09003883fba67f
Tegra186: mce: driver for the CPU complex power manager block

The CPU Complex (CCPLEX) Power Manager (Denver MCE, or DMCE) is an
offload engine for BPMP to do voltage related sequencing and for
hardware requests to be handled in a better latency than BPMP-firmware.

There are two interfaces to the MCEs - Abstract Request Interface (ARI)
and the traditional NVGINDEX/NVGDATA interface.

MCE supports various commands which can be used by CPUs - ARM as well
as Denver, for power management and reset functionality. Since the
linux kernel is the master for all these scenarios, each MCE command
can be issued by a corresponding SMC. These SMCs have been moved to
SiP SMC space as they are specific to the Tegra186 SoC.

Change-Id: I67bee83d2289a8ab63bc5556e5744e5043803e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
plat/nvidia/tegra/soc/t186/drivers/include/mce.h [new file with mode: 0644]
plat/nvidia/tegra/soc/t186/drivers/include/t18x_ari.h [new file with mode: 0644]
plat/nvidia/tegra/soc/t186/drivers/mce/aarch64/nvg_helpers.S [new file with mode: 0644]
plat/nvidia/tegra/soc/t186/drivers/mce/ari.c [new file with mode: 0644]
plat/nvidia/tegra/soc/t186/drivers/mce/mce.c [new file with mode: 0644]
plat/nvidia/tegra/soc/t186/drivers/mce/nvg.c [new file with mode: 0644]
plat/nvidia/tegra/soc/t186/platform_t186.mk