ASoC: Intel: boards: use devm_clk_get() unconditionally
authorPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Fri, 8 Sep 2017 17:43:52 +0000 (12:43 -0500)
committerMark Brown <broonie@kernel.org>
Tue, 19 Sep 2017 13:36:18 +0000 (14:36 +0100)
commit7735bce05a9c0bb0eb0f08c9002d65843a7c5798
treeb61861e2ac67aa1ec702f6e02a868fff11ba3814
parent86cb5dee237be6cf6c432299b829a5e85ed35029
ASoC: Intel: boards: use devm_clk_get() unconditionally

The clock framework was only used in Baytrail, on Cherrytrail
the firmware takes care of the MCLK/plt_clk_3.

With the fix in 'commit d31fd43c0f9a
("clk: x86: Do not gate clocks enabled by the firmware")'

the firmware-managed clocks are not impacted by enable/disable
requests make at the driver level, and the rates are identical.

Remove all checks for Baytrail and use devm_clk_get()
unconditionally. Tested on Asus T100HA (CHT) and Asus T100TAF (BYT)

Note that the RT5640 and RT5645 machine drivers need to keep some
checks for Valleyview to check for Baytrail-CR.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Acked-By: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/boards/bytcr_rt5640.c
sound/soc/intel/boards/cht_bsw_rt5645.c
sound/soc/intel/boards/cht_bsw_rt5672.c