drivers: net: cpsw-phy-sel: Clear RGMII_IDMODE on "rgmii" links
authorAlex <alex.g@adaptrum.com>
Tue, 6 Dec 2016 18:56:51 +0000 (10:56 -0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 7 Dec 2016 18:12:17 +0000 (13:12 -0500)
commit74685b08fbb26ff5b8448fabe0941a53269dd33e
tree10715d3af4ad86f119a32cc4b47780b8b5ca5ee5
parent233900d8857dc426557751e30b2150778974417c
drivers: net: cpsw-phy-sel: Clear RGMII_IDMODE on "rgmii" links

Support for setting the RGMII_IDMODE bit was added in the commit
referenced below. However, that commit did not add the symmetrical
clearing of the bit by way of setting it in "mask". Add it here.

Note that the documentation marks clearing this bit as "reserved",
however, according to TI, support for delaying the clock does exist in
the MAC, although it is not officially supported.
We tested this on a board with an RGMII to RGMII link that will not
work unless this bit is cleared.

Fixes: 0fb26c3063ea ("drivers: net: cpsw-phy-sel: add support to configure rgmii internal delay")
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/ti/cpsw-phy-sel.c