n1sdp: fix DMC ECC enablement sequence in N1SDP platform
authorManoj Kumar <manoj.kumar3@arm.com>
Mon, 22 Jul 2019 15:10:12 +0000 (16:10 +0100)
committerManoj Kumar <manoj.kumar3@arm.com>
Tue, 23 Jul 2019 09:54:14 +0000 (10:54 +0100)
commit7428bbf4437e046b1bd5f43506abed2fb621b7bc
treeb7f02c82dbf2c1880f84e0e7fa5d8e5643ac3fd4
parent53f3751b89b4dabb1975038b170fd8da9d2f14bd
n1sdp: fix DMC ECC enablement sequence in N1SDP platform

The DMC-620 memory controllers in N1SDP platform has to be put
into CONFIG state before writing to ERR0CTLR0 register to enable
ECC.

This patch fixes the sequence so that DMCs are set to CONFIG
state before writing to ERR0CTLR0 register and moved back to
READY state after writing.

Change-Id: I1252f3ae0991603bb29234029cddb5fbf869c1b2
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
plat/arm/board/n1sdp/n1sdp_bl31_setup.c
plat/arm/board/n1sdp/n1sdp_def.h