ARM: sun5i: Allow PLL3 2x fixed factor clock to change PLL3 rate
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 22 Jun 2016 09:15:55 +0000 (11:15 +0200)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 4 Jul 2016 19:18:11 +0000 (21:18 +0200)
commit73ba3a1c64a4c5a1a4b87c773714814eecb84877
treebceada543b22eaf161c181500c1f1eb418489daf
parent6a706356b4456204fd89ef3fbfc6ed4165cebf37
ARM: sun5i: Allow PLL3 2x fixed factor clock to change PLL3 rate

In order to be able to properly generate its pixel clock, the pll3-2x fixed
factor needs to be able to change the PLL3 rate too.

Add the needed extra compatible so that it behaves that way.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun5i.dtsi