net: phy: broadcom: Fix auxiliary control register reads
authorFlorian Fainelli <f.fainelli@gmail.com>
Tue, 22 May 2018 23:22:26 +0000 (16:22 -0700)
committerDavid S. Miller <davem@davemloft.net>
Wed, 23 May 2018 19:18:00 +0000 (15:18 -0400)
commit733a969a7ed14fc5786bcc59c1bdda83c7ddb46e
treeda35b9fece1168c29fc03c27f212800f97d0f4b4
parent2eabd764cb5512f1338d06ffc054c8bc9fbe9104
net: phy: broadcom: Fix auxiliary control register reads

We are currently doing auxiliary control register reads with the shadow
register value 0b111 (0x7) which incidentally is also the selector value
that should be present in bits [2:0]. Fix this by using the appropriate
selector mask which is defined (MII_BCM54XX_AUXCTL_SHDWSEL_MASK).

This does not have a functional impact yet because we always access the
MII_BCM54XX_AUXCTL_SHDWSEL_MISC (0x7) register in the current code.
This might change at some point though.

Fixes: 5b4e29005123 ("net: phy: broadcom: add bcm54xx_auxctl_read")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/bcm-phy-lib.c