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(parent: 06c77f5) | patch
staging: iio: ad7816: Set RD/WR pin and CONVST pin as outputs.
authorNishad Kamdar <nishadkamdar@gmail.com>
Fri, 9 Nov 2018 07:37:18 +0000 (13:07 +0530)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 11 Nov 2018 15:29:50 +0000 (15:29 +0000)
commit72e3a5248da9046d17aec9366976a3ec45ceeb3c
tree2d5a032d483b2293d5890b87fe424f2e8c4fcd87tree | snapshot
parent06c77f564ddb6a3f4a2553c02c36d62cc1a596f7commit | diff
staging: iio: ad7816: Set RD/WR pin and CONVST pin as outputs.

The RD/WR pin and CONVST pin are logical inputs to the AD78xx
chip as per the datasheet. Hence convert them to outputs.

Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
drivers/staging/iio/adc/ad7816.c diff | blob | history
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